1. Field of the Present Disclosure
This disclosure relates generally to the field of electric power distribution and, in particular, to power factor correction in single phase and multi-phase systems using a sample and hold technique.
2. Description of Related Art including information disclosed under 37 CFR 1.97 and 1.98
Neufeld, U.S. Pat. No. 5,006,975, discloses a power factor correction circuit in which a divided-down version of a rectified input waveform is sampled approximately at its peak by a sample-and-hold circuit. The peak value is then processed to produce a correction signal which is subtracted from the original divided down rectified signal. This produces a reference signal which is then multiplied by the output of an error amplifier to produce a sinusoidal reference signal for the input current. The output of the error amplifier which is used is that which is sampled periodically when the divided-down rectified signal approaches zero volts. The sinusoidal reference is used by peak and valley comparators whose other inputs come from a current sense amplifier. The outputs of the comparators are used to switch a shunting transistor which controls the input current to achieve near unit y power factor.
Kammiller et al, U.S. Pat. No. 5,619,405, discloses a regulated power supply having power factor correction control which includes a state variable integrator/error amplifier that provides a low distortion error signal during steady state operation and fast transient response for tight output voltage control.
Curtiss et al, U.S. Pat. No. 4,356,440, discloses a discrete-time, closed loop power factor corrector system controlling the coupling of a delta-connected switched capacitor array to a 3- or 4-wire power line which may have time-varying, unbalanced, inductive loads. For inductive loads that cannot be exactly compensated with a delta-connected capacitance, the corrector system minimizes the total RMS reactive current drawn from the power line.
Ball et al, U.S. Pat. No. 6,756,771, discloses a power factor correction device which stores the output of an error amplifier on a storage element. A zero crossing detector detects the zero crossings of the AC input voltage and enables the power factor correction device to adjust the value of the voltage stored on the storage element.
Bridgeman, U.S. Pat. No. 6,147,475, discloses a method for predicting harmonic-distortion values for the application of a desired step change of capacitance to an AC system, an initial step change is applied and, from this change, and a value of harmonic impedance of the system for each of a number of harmonics is determined. From these harmonic-impedance values corresponding values of damping resistance are, in turn, determined and, using the determined harmonic-impedance and damping-resistance values, corresponding values of an electrical load parameter, preferably load voltage, are determined for the desired step capacitance change. The method is conveniently extended to cover a method and apparatus for applying power-factor correction capacitance, in which the load-voltage values for the various harmonics are evaluated to see if they represent a potential resonance condition and, if so, a step change other than the desired change is applied. Where no resonance is indicated, the originally intended step change is applied.
Allinder, U.S. Pat. No. 7,400,517, discloses a power factor correction circuit configured to use a stored value of a feedback signal to assist in regulating the value of an output voltage and to bypass the sample and hold circuit if the output voltage increase to an upper limit or decreases to a lower limit.
Coleman, U.S. Pat. No. 7,315,150, discloses a ripple current mode power converter comprised of a magnetic energy storage element, and a method of determining magnetic storage element charge duration based on periodic magnetic storage element current samples. In the preferred embodiment a controller processes a magnetic storage element ripple current, and average sampled current, to achieve high power factor forgoing the need to sense the AC signal current and voltage levels. The controller element periodically calculates the magnetic storage element charge duration to control the state of the switch element to maintain the AC input current proportional to the AC input voltage.
Li, U.S. Pat. No. 7,359,224, discloses a circuit for providing power factor correction in accordance with an embodiment of the present application which may include a boost converter circuit and a control circuit receiving as inputs; a rectified AC input voltage from a rectifier, a signal proportional to current through the boost inductor and the DC bus voltage across the capacitor of the boost converter. The control circuit provides a pulse width modulated signal to control the on time of a PFC switch. The control circuit further includes a voltage regulator and a current regulator. The current regulator includes a difference device operable to subtract a signal proportional to the inductor current from the current reference signal, a PI controller adapted to receive the output of the difference device and provide a first control signal, a feed forward device operable to receive the rectified AC input voltage and to provide a second control signal with a smaller dynamic range than the AC input voltage, and an adder operable to add the first control signal to the second control signal to provide a PWM reference signal for generating the pulse width modulated signal. A zero crossing detector and vector rotator may be provided to provide a clean sinusoidal reference to the current regulator. A partial PFC regulator may be provide to provide partial mode PFC if desired.
Shteynberg et al, U.S. Pat. No. 7,149,097, discloses a switch mode AC/DC converter with input current shaped for unity power factor. Input current is modulated by input voltage, an input inductor and an isolation transformer driven with the same duty ratio, with a low voltage across a bulk capacitor. This voltage is determined only by input voltage amplitude. Energy stored in a leakage inductance of the transformer is returned back to the internal DC source. A soft switching circuit is connected to the primary side, eliminating the need for high side drive. Sources of the main and auxiliary switches and primary winding of the transformer are connected to ground for easy primary voltage sensing. Overvoltage protection circuit of the output is connected to exclusively primary side signals. Secondary synchronous rectifier is driven by a circuit synchronized with the system clock. The circuit can be coupled to either the primary or the secondary winding of the isolation transformer.
Acatrinei, US application 2005/0212501, discloses a low cost high performances power factor correction method, system and apparatus, comprising an AC power source able to provide a low frequency supply signal, a low frequency pass filter circuit able to protect the power source against reverse high frequency signal noise, a rectifier circuit able to provide a fully rectified low frequency supply signal, a high frequency DC/DC converter circuit able to convert the fully rectified low frequency supply signal into a rectified high frequency supply signal having the capability to absorb and deliver at any moment a current amount contingent and linearly proportional in amplitude to its supply voltage amount and/or its driving pulses duty cycle ratio, a small signal controller circuit able to control the converter circuit and a complex load circuit including at least one capacitor able to store the rectified high frequency supply signal, so the small signal controller circuit controls the large signal converter circuit by means of a pulse width modulation driving signal consisting of trains of pulses constant in frequency and duty cycle during a period of time equal or longer than one of the AC power source supply signal semi-cycle period so during each the supply signal's semi-cycle period, as long as the controlling pulse is constant, the current amount absorbed by the large signal circuit from the AC power source is contingent and linearly proportional to the AC power source's voltage amount only, so the AC power source's output current and voltage amount follows an identical graphic shape and so the energy transfer's power factor parameter of the AC power source and the complex load system is improved to near unity.
The related art described above discloses circuits using sample-hold technique for power factor correction in a power system. However, the present invention using a sample and hold circuit that distinguishes over the prior art providing heretofore unknown advantages as described in the following summary. In the present AC electrical system a source produces an input voltage and current. The source is interconnected through an energy storage device with a load across which an output voltage appears, and a unity power factor control circuit is operated according to a method for maintaining unity power factor. This method comprises the steps of producing a sample and hold voltage derived from the input voltage and the output voltage wherein the sample and hold voltage maintains constant values between pulses of a clock signal. A modulated signal is turned on at each clock pulse fall. Sampling of the input voltage is initiated each time the clock signal turns on and holds the input voltage when the clock signal turns off. The held voltage value continues to be held until a current feedback voltage equals the held voltage whereupon the modulated signal turns off thereby drawing the input voltage and the input current into phase over a plurality of cycles of the clock signal.